Petaflop era for semiconductor manufacturing: Page 2 of 2

January 29, 2021 // By Nick Flaherty
Petaflop era for semiconductor manufacturing
Computational Design Platform from DS2 with Nvidia A40 GPU achieves 1.8 PFLOPS for designing masks

at total of 40 systems to leading edge fabs around the world, including to Nvidia for its chips made at TSMC.

“The entire semiconductor industry faces increasingly difficult challenges with each new process node,” said Jerry Chen, Head of Manufacturing Business Development at Nvidia. “GPU acceleration has inevitably become the industry standard for computational lithography, and we look forward to leveraging the manufacturing benefits of D2S’s latest generation solution, based on the NVIDIA Ampere architecture, for our own future products.”

The D2S TrueMask tool uses the Computational Design Platform for photomask designs using complex rectilinear and curvilinear shapes for superior wafer quality within practical, cost-effective write-times. D2S is the managing sponsor of the eBeam Initiative and a founding member of the Centre for Deep Learning in Electronics Manufacturing (CDLe).

www.design2silicon.com.

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