SDK and neural network IP for low-power FPGA-based smart vision

May 18, 2020 //By Julien Happich
neural network
Through its Smart Embedded Vision initiative, Microchip Technology aims to address the growing need for power-efficient inferencing in edge applications by making it easier for software developers to implement their algorithms in the company’s PolarFire FPGAs.

Microchip’s VectorBlox Accelerator SDK is designed to enable developers to code in C/C++ and program power-efficient neural networks without prior FPGA design experience.

The highly flexible tool kit can execute models in TensorFlow and the open neural network exchange (ONNX) format which offers the widest framework interoperability. ONNX supports many frameworks such as Caffe2, MXNet, PyTorch, and MATLAB. Unlike alternative FPGA solutions, Microchip’s VectorBlox Accelerator SDK is supported on Linux and Windows operating systems. It also includes a bit accurate simulator which provides the user the opportunity to validate the accuracy of the hardware while in the software environment. The neural network IP included with the kit also supports the ability to load different network models at run time.


Vous êtes certain ?

Si vous désactivez les cookies, vous ne pouvez plus naviguer sur le site.

Vous allez être rediriger vers Google.