In their paper "Simultaneous Imaging and Energy Harvesting in CMOS Image Sensor Pixels" published in the IEEE Electron Device Letters, the researchers detail their approach, differentiating their design from other proposed energy-harvesting CMOS image sensors which either have to switch between an imaging and a photovoltaic operation mode or include an additional P-N diode in parallel with the imaging pixel, negatively impacting the pixel's fill factor.
In the first instance, Energy Harvesting Imager (EHI) must reconfigure the mode of pixel operation by time multiplexing, choosing between lowering the number of image frames per second for more energy harvesting, or prioritizing the imaging operation over energy generation. In the second instance, the additional P-N diode(s) take on valuable pixel real-estate, lowering the pixel's efficiency.
The authors describe how they modified a conventional EHI architecture by first adopting a hole-based imaging technique, accumulating photo-generated holes in the P+ region as a signal-charge carrier, using two vertically-stacked P-N-P junctions in the standard CMOS process without additional masks. Although the N-well does not need to be switched for different modes of operation, it can be connected to the same node for continuous energy harvesting (VEH). But the researchers didn't just flipped the polarities of the wells and implants from a conventional EHI architecture, they further optimized their pixel with three PMOS transistors for reset, selection, and signal readout, while maximizing the fill factor for energy harvesting.