ARM is looking to develop a wearable heart monitor using plastic technology rather than silicon alongside a CMOS process and different memory techniques being developed by its process partner PragmatIC.
ARM has demonstrated an M0+ microcontroller on the current NMOS plastic chip process to demonstrate how the technology can be used and is now working on an ultra low cost plastic heart monitor chip mounted on a flexible battery. The plastic chips cost a few cents to produce.
The PlasticARM microcontroller demonstrator chip uses a limited amount of program storage at 465bytes used to show the chip was operating correctly. Rather than developing an equivalent of EEPROM or flash memory on the plastic process, ROM memory could be provided by simply printing memory patterns as dots onto the chip. This could be easily updated and would also help to reduce power.
“The follow on project is a skin wearable heart monitor and this has interesting things around power,” said James Myers, distinguished engineer ARM leading circuit design who lead the PlasticARM development. “We need 48 hour battery life but that’s a challenge for us working with flexible batteries. We have power design to do and monitoring algorithms to do as we can’t just take existing algorithms and port them over.” However having a programmable engine and low cost memory technique would allow partners to use their own proprietary IP on the device.
“What’s interesting is a print programmable ROM where you leave a hole in the passivation and print dots on top,” he said.
- ARM shows first plastic M0+ microcontroller
- NFC tags integrated into paper packaging
- First complementary vertical organic transistors reach GHz speeds
- Flexible fab could slash chip shortage
The PlasticARM has 18,000 gates and runs at 29kHz. It was developed from a Python behavioural model and the team is using this model for the heart monitor with a mix of programmable and fixed functions. “We had a system model in Python and rendered it to Verilog, its not handwritten RTL” said Myers. “That’s not to say it will be push button but using IP is all about cost effectiveness so we look at what can we do to still make it easier to use for people.”
“In the early days we had a bunch of work to do together to describe the technology in the tools,” said Myers. “We took the hit early on with models, characterisation, standard cell libraries, but we recruited two of ARM’s founders who were around originally which helped.”
That was John Biggs, one of the early employees in Cambridge and lead author of the paper in Nature that describes the design process.
PragmatIC is also working on developing the plastic chip process technology for its foundry service, including the NMOS transistors that would enable a complementary CMOS capability.
“There is a CMOS process is in R&D and if we had that we would use it, but it depends on what you are doing,” said Catherine Ramsdale SVP technology Pragmatic. “That depends on the power budget and area available and each specific instance will be different. We have several active programmes and I expect to be in production [with that] in the next few years,” she said.
“We also have active work going on in reprogrammable memory and that’s an R&D project,” she said. This includes laser programmable one time programmable (OTP) memory. The cycle time for the fab is a few days, making changes easy to do.
The current 0.8um process can produce devices tens of millimetres in size and the current equipment is capable of going down to 300nm (0.3um) she says. This would increase the number of gates available on a plastic chip.
“There is a practical limit with the stepper shot size - you can stitch shots together but its dependent on the shot size,” she said. “But it’s still about cost. If you go smaller you can change the size of the resistors and lower the power but there’s a limit on the tool set. If the tools are more expensive then you need to look at the overall cost structure. Reducing the channel length on its own doesn’t save you much in footprint.”
However the process scaling is also less important with low cost plastic devices, says Myers.
“Making multichip modules are super easy,” said Myers, as the big pad pitch allows multiple devices to be easily stuck onto a paper or plastic substrate using conductive ink to make the connections. This could be a route to the heart monitor design with separate plastic devices for the analogue front end (AFE) and digital processing. ARM is set to publish another paper on the AFE used with its plastic neural network sensor design.
Myers says he is also looking for partners to develop applications in other areas using the technology. Interested parties can contact eeNews Europe.
- Flexible electronic “Tattoo” as a dual-signal heart-monitor
- Medical grade ECG/EKG monitoring for consumer wearables
- Philips in €2.3bn biotelemetry merger
Other articles on eeNews Europe