Terabit-scale Ethernet PHY supports high-density 400 GbE and FlexE

May 30, 2019 //By Julien Happich
Gigabit Ethernet
All integrated in a single chip, Microchip’s META-DX1 Ethernet Physical-Layer (PHY) devices combine Ethernet ports from 1 Gigabit Ethernet (GbE) to 400 GbE, Flexible Ethernet (FlexE), Media Access Control Security (MACsec) link encryption and nanosecond timestamping accuracy at terabit capacity.

The META-DX1 enables line cards to quadruple in capacity, from 3.6 terabits per second (Tbps) to 14.4 Tbps with 36 ports of 400 GbE or 144 ports of 100 Gigabit Ethernet, while supporting key features needed by service providers.

The META-DX1 MACsec engine secures traffic leaving the data centre or enterprise premises. FlexE enables both cloud and telecom service providers to meet capacity requirements while reducing fibre-plant capital expenditures by optimally configuring links beyond today’s fixed-rate Ethernet so they can use low-cost, high-volume optics. The chip’s integrated flexible crosspoint switching capability makes it easier for OEMs to navigate the market transition from 25 Gbps NRZ and 56 Gbps PAM-based architectures by enabling them to support a single design or SKU for both 100 GbE (QSFP28) and 400 GbE (QSFP-DD) optics. By providing high-performance timestamping with nanosecond-level accuracy on every port, META-DX1 also ensures network buildouts will meet the challenging timing requirements of 5G mobile base station deployments.

Initial META-DX1 family members will sample during the third calendar quarter of 2019. All are hardware-compatible and supported by the same Software Developer’s Kit (SDK).

Microchip Technology - www.microchip.com

 


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