AI and DSP boost for FPGA signal processing

AI and DSP boost for FPGA signal processing

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By Nick Flaherty

AMD has launched a premium version of its Versal FPGA with AI chiplets for next-generation radar and wireless systems.

The Versal Premium series with AI Engines is part of the 7nm Versal adaptive compute acceleration platform (ACAP) portfolio and are aimed at radar applications, signals intelligence, wireless system testing and wireless device testing.

The family has two ARM Cortex A72 cores with two ARM Cortex R5F cores for real time processing with 32KB/32KB of L1 Cache and 256KB of TCM memory w/ECC. Two members of the family have 472 AI accelerator cores, with the VP2502 having 7,392 DSP engines and the VP2802 14,304 DSP engines. The AI accelerators are implemented as chiplets on top of the processor and FPGA substrate.  

The Premium devices have four times the signal processing capacity of the previous 16nm Virtex UltraScale+ VU13P FPGA, although the current 7nm ACAP devices have up to 400 AI accelerators.

The family also eliminates I/O bottlenecks with up to 9Tb/s serial bandwidth, and reduces size, weight and power by using hardened, ASIC-like cores for 100G/600G Ethernet cores, 400G High-Speed Crypto Engines, DDR memory controller, and integrated PCIe 5.0 blocks. 

Last month, AMD launched the VCK5000 board with the 7nm XCVC1902 Versal Prime ACAP device. This has 400 AI engines (AIE) running at 1.25 GHz, with 1,968 DSP engines in programmable logic (PL), providing up to 145TOPS (INT8) for AI inference.

Xilinx points to the advantages of using the reconfigurable substrate to feed the AI accelerators. This enables Xilinx to almost eliminate ‘dark silicon’, says Nick Ni, senior  Director, Data Centre AI and Compute Markets at Xilinx. This provides significantly more utilisation of the AI accelerators, boosting the performance of inference engines in benchmarks.

The Versal Premium series with AI Engines is expected to begin shipping in the first half of 2023.

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