Breakthrough chip for 100G passive networking
Researchers in Belgium have developed a chip that enables the next generation of passive optical networks (PON) for high speed broadband networks in a world first.
The team from IDLab, an imec research group at Ghent University and the University of Antwerp, along with Nokia Bell Labs, have shown the first upstream linear burst-mode transimpedance amplifier (TIA) chip that accommodates 50 Gbit/s NRZ and 100 Gbit/s PAM4 modulation.
The chip enables optical line terminals (OLTs) to cope with upstream packets’ varying signal strength and quality degradation for the next generation of passive optical networks. The TIA chip will be critical for 100G PON networks for high-speed broadband to residential and business networks as well as 5G mobile fronthaul and backhaul links.
The TIA chip shown at the European Conference on Optical Communication (ECOC) this week is built in a 0.13 μm SiGe process. It comes with a power consumption of 275 mW (on average) from a 2.5 V supply. Its total settling time is well under 150 ns, meeting the typical PON target preamble time.
“This world’s first is a breakthrough to facilitate the future roll-out of large-scale 100G PONs,” said Gertjan Coudyzer, senior researcher in analog/mixed signal IC design at IDLab. “During our experiments, we have been able to validate the chip’s linear burst-mode operation; a linearity not only enabling signal equalization, but also paving the way for PAM4 as a future PON modulation format – doubling the bitrate compared to the use of NRZ.”
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10G PON sales are growing fast and the first 25G PON solutions being commercially introduced, but several challenges remain to be addressed before 50G and 100G PONs can be rolled out, particularly for upstream connections.
Upstream packets arriving at an OLT’s receiver may exhibit a large dynamic range of optical powers. This is due to the differential path loss of the optical distribution network, as well as the variation in optical network terminal (ONT) transmitters’ launch powers.
The distance between an OLT and its ONTs is also a determining factor, as this can vary from a few hundreds of metres to few tens of kilometres.
“As those effects are compounded even further by the high speeds at which next-gen PONs operate, it will be crucial to make sure that all packets arriving at the OLT end up having roughly the same signal strength. Moreover, this must be done with minimal overhead – i.e. no more than a few tens of nanoseconds,” said Coudyzer at IDlab. “Our novel chip does exactly that, allowing us to use each packet – and the network as a whole – to the fullest, maximizing its speed, reach and throughput.”
“Rolling out a fibre network is a huge investment. Once it has been deployed, operators want to leave their network untouched for at least a couple of decades. Today’s announcement confirms that operators’ networks are future-ready, and capable of supporting higher bandwidths should the need for that arise,” adds Peter Ossieur, program manager high-speed transceivers at IDLab. “Going forward, we are looking at the ITU-T to pick up our development and include it in their standardization efforts.”
“The demonstration of our burst-mode transimpedance amplifier chip, resulting from fruitful and long-standing collaboration with imec, re-confirms Nokia’s technical leadership in higher speed passive optical networks,” stated Tod Sizer, Optical System and Device Lab Leader, Nokia Bell Labs. “The results are timely, as targets for 50G upstream PON are being defined in ITU G.9804. Thanks to its linearity, the TIA chip also supports 100G flexrate PON using higher order modulation.”
“Future challenges will continue to be closely linked to the (growing) distance between end users and the central office – as telecom operators try to expand their customer base to more rural areas. Hence, strategies to flexibly provide different customers with different PON flavors from the same OLT will continue to gain momentum, requiring new digital signal processing approaches, updates to the optical receivers, and the development of increasingly linear circuits. Those are exactly the topics that rank highly on our research agenda; topics on which we continue to welcome the input and involvement of partners,” said Ossieur.
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