Cloud-based RISC-V evaluation platform for sustainable compute
UK startup VyperCore is launching a cloud-based evaluation platform for its sustainable RISC-V accelerator chip and chiplet.
The VyperLab platform runs on an FPGA in Amazon Web Services to allow developers to benchmark existing code without the need to recompile.
VyperCore supplies the FPGA implementation of its prototype Booth RISC-V processor design to run on the AWS instance, and developers can run their existing code on the instance. The code is then run again on a generic RISC-V processor to show the difference in performance.
“They can deploy code rather than port, that’s a key difference,” VyperCore CEO Russell Haggar tells eeNews Europe. This gives a increase of up to 5x in performance for application code that relates to an 80% saving in power consumption for datacentres, he says.
- UK startup plans 5nm RISC-V server chip and card
- RTL simulation of Booth RISC-V processor
- Sustainable AI report looks at power, open source hardware
“With a huge roll out of datacentres worldwide one of the biggest issues is energy into the datacentre and cooling. If you are burning less energy you need less cooling. It’s a huge sustainability story,” said Haggar.
“There has been no step change in general purpose compute for decades with pipelining and branch prediction. Where we have seen the step change is in AI and that whole area has been interesting enough for a new architecture that needs new code. General Purpose CPUs don’t have that luxury as they have to run existing code, and that will hold the industry back on the sustainability side, so a step change is needed and no one else has anything close as far as we know.”
The VyperCore memory management technology is embedded into a RISC-V processor to improve the efficiency of instruction execution. This also provides hardware enforced memory-safety following Secure by Design principles with an architecture that eliminates the impact of memory safety vulnerabilities which are responsible for 70% of cybersecurity issues.
Existing code can be run without changes on the FPGA in VyperLab to demonstrate the acceleration and power saving.
“We ask partners to run their code twice. This shows they can move their code over to the architecture,” said Haggar. “They run the code on the FPGA and the second time on a simulation of a vanilla RISC-V core and what we are doing is counting cycles. A report card breaks down the performance and on a like for like basis we see an acceleration, and we think that will be up to 5x. It will vary by application,” he said. “When we have our silicon that will give 5x performance or 5x less silicon which is 80% less power depending on the chip and the power supply.”
This will be key for datacentre users who want to show their sustainability data. “If you are a user with your own ESG requirements they can do it 5x cheaper or with less energy,” said Haggar.
VyperCore is planning to ship its chip on an accelerator card to sit alongside the CPU in the datacentre but it is also planning a chiplet that could be co-packaged with an existing processor.
“The first product is accelerator cards but the technology has the ability to be inside a device as a chiplet or in an architecture with our technology incorporated. We know that the technology will apply to the other architectures equally,” he said.
The startup has been part of the Intel Ignite technology accelerator in London.
“The progress that the team at VyperCore has made since graduating from the Intel Ignite London programme is truly impressive,” said Kevin Crain, recent CTO of Intel Ignite London. “They now have a fully demonstrable system that allows customers to experience the substantial energy savings and five-fold acceleration in future production hardware.”
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
