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Compilers in Times of Machine Learning – Interview with Albert Cohen (Google)

Interviews |
By Wisse Hettinga


‘Intermediate Representation’ is the building block for optimising compilers, now and in the future’, explains Albert Cohen, research Scientist at Google.

In the preparation of the HiPEAC conference at Toulouse in January 2023, I meet up with Albert to discuss his research on compilers. He explains that this IR ‘building block of computing performance’ is getting more and more interesting with the advent of HPC, parallel systems, the Internet of Things and Machine learning/Artificial Intelligence.

The actual name of this compiler is MLIR; Multi-Level Intermediate Respons’ and over the past 4 years it has come from research into the real world applications and has become part of the LLVM foundation. (https://mlir.llvm.org). From the LLVM website: The MLIR project is a novel approach to building reusable and extensible compiler infrastructure. MLIR aims to address software fragmentation, improve compilation for heterogeneous hardware, significantly reduce the cost of building domain specific compilers, and aid in connecting existing compilers together.

 

 

Is hardware defining software or software defining hardware? This is another discussion point we touched on in our discussion. Is hardware getting more flexible than software? ‘You can now define hardware for specific application domains’, explains Albert. ‘Not that that is new, remember the x87 architecture for floating point, that is an early example of software defining hardware’.

Albert is the general chair of the HiPEAC conference, taking place from January 16 until January 18 in Toulouse. Find all the details here: www.hipeac.net

This and many more thoughts and discussion on MLIR in the interview.

Wisse Hettinga


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