European RISC-V firms support SignatureIP NoC Networks-on-Chip
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Several European chip designers are supporting the network on chip (NoC) technology from US startup SignatureIP.
Codasip in Germany and SemiDynamics in Spain are using the configurable NoC tools from SignatureIP to link their RISC-V open architecture cores.
“SignatureIP was founded with the goal of making every customer’s SoC optimized to exploit the full speed and efficiency of the most modern interconnect available. When we set out on initial product development in 2021, it was clear that the processor landscape was undergoing a fundamental shift, from industry-wide dependence on one main architecture to encompassing an open-source revolution. Therefore, processor agnosticism is fundamental part of SignatureIP’s development philosophy,” said Purna Mohanty, CEO, SignatureIP
SignatureIP’s NoC is designed to align with RISC-V CPU requirements for scalability, flexibility, performance and power optimisation.
To support the varying configurations and sizes of RISC-V CPUs, SignatureIP’s NoCs can efficiently scale to connect these different cores together, managing communication between them and other system components without bottlenecks.
With the custom nature of many RISC-V CPUs from developers such as CodaSip and SemiDynamics, SignatureIP’s NoCs are flexible, allowing designers to customize the network architecture to meet the specific requirements of the RISC-V cores they are integrating.
The NoC architecture supports optimized routing algorithms and protocols that can handle the high-speed data transfers and low-latency communication needed by RISC-V cores, while keeping a tight power and size envelope.
“The close collaboration between members of the RISC-V community is one of the driving forces of the architecture’s rapidly growing adoption. There is a natural synergy between the offerings of Semidynamics and SignatureIP – which have been fully tested together to ensure compatibility and minimal verification time. By combining our technologies, customers can create multi-core chip designs on a fully coherent RISC-V/CHI platform and then prototype them on an FPGA to demonstrate the integrated performance,” said Roger Espasa, CEO and Founder of Semidynamics.
“At Codasip, we are focused on enabling designers to customize their solutions to significantly improve their PPA. This is uniquely enabled by the flexible RISC-V ISA. By collaborating with partners such as SignatureIP, we can leverage diverse expertise to enhance RISC-V’s modular and extensible architecture and accelerate the deployment of RISC-V in high-performance computing as well as embedded systems,” said Mike Eftimakis, VP Strategy and Ecosystem at Codasip.
There is also support from Andes Technology in Taiwan and SiFive and Marquee Semiconductor in the US.
“SignatureIP’s NoC solutions, with a focus on interoperability and configurability, are entering the market at the right time. Designers must be able to integrate high-performance, low-power CPU IPs like those from Andes, without added interconnect complexity. SignatureIP’s easily accessible cloud-based iNoCulator tool can help customers accelerate innovation and continue to proliferate the RISC-V architecture,” said Samuel Chiang, Deputy Director of Marketing at Andes.
“As SoC complexity continues to increase, NoC requirements are likewise increasing. Customers need best-in-class processor IP as well as efficient, flexible and scalable NoCs that will work seamlessly together. SignatureIP’s iNoCulator tool is a welcome addition to the NoC field,” said John Ronco, SVP Product at SiFive, which also works with the NoC from competitor Arteris.
Mukesh Sukla, Head R&D at Marquee said “As a provider of design services for complex mixed-signal SoCs, our projects include high-speed connectivity protocols, chiplet-based designs and AI/ML accelerators. For those designs requiring a NoC, we partner with SignatureIP because of the company’s flexibility, support and highly configurable solutions – both coherent and non-coherent NoCs, depending on the project.”
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