FPGA puts AI in space
Xilinx has launched its first FPGA with space qualification for a decade, designed to support machine learning and artifical intelligence frameworks.
The XQRKU060 Ultrascale Radiation Tolerant (RT) Kintex FPGA is built on a 20nm process, compared to the 65nm process used for previous space qualified Virtex devices. This gives four times the logic capacity, with 633 logic blocks, and ten times the digital signal processing with 2760 DSP slices, as well as 32 Serialiser/deserialiser (SERDES) high speed interfaces.
“Machine learning in space is in its nascent stage but starting to make ground in the next four to five years,” said Minal Sawant, Space Systems Architect at Xilinx. THe move to 20nm enables up to 5.7 teraoperations per second (TOPs) of peak performance for 8bit integer frameworks (INT8), nearly 25 times that of the previous generation.
For machine learning, the architecture has been extended with wide 27 x 18 multiplier and extra accumulator blocks which otherwise would have to be implemented in the logic array. Initial support is for open source machine learning compilers and DNN array such as TensorFlow and PyTorch, but d the future roadmap includes the Xilinx Vitis AI framework. “This will open up a whole new world of how to use machine learning in space,” said Sawant.
One initial use for the device is in large geostationary satellites that handle communication links, hence the 32 high speed SERDES interfaces. Another is for pattern recognition of camera images.
A key capability is that the parts can be upgraded in space, for example to upgrade an ML inference framework, However the initial use is likely to be bug fixes, says Sawant.
The FPGA can be reprogrammed by changing the 192Mbit bitfile that configures the chip. With larger 1Gbit non-volatile memories qualified for space use, up to three separate bitfiles can be stored with completely new functions.
“The Ultrascale Kintex has true unlimited in-orbit reconfigurable – you can send a new bitfile and change the design and there is no limit,” she said. “What we have seen is you can store the bit file in non-volatile memory before launch. The second way is via the onboard computer to do the change, for example for a bug fix.”
Protection against errors from single event upsets (SEUs) caused by radiation is key for space qualified parts. A triple module redundant (TMR) approach is used for some elements, such as three versions of the embedded MicroBlaze processor. “You don’t have to TMR the whole chip,” she said. “Where we knew the circuit was more susceptible we beefed up those portions. The control circuits for the logic, DSP and DRAM we beefed up with process techniques, duplicate or triple cells, increasing the gate lengths etc. Then there is software mitigation on top of that, with duplicate portions of the circuit in the logic array.”
The device is qualified from -55 to +125 ˚C and withstands a total dose of 100Krad and single event latchup (SEL) of >80MeVcm2/mg. This is the requirement for a geostationary orbit, and exceed that for low earth orbit designs. It is packaged in a 40 pin ceramic package.
A development board uses SRAM and non-volatile memories from Infineon Technologies, DDR3 and an MCU from Cobham and high speed space qualified ADCs from Texas Instruments and Teledyne e2V. A TMR Synthesis tool from Mentor Graphics supports the design of redundant logic, and Seakr Engineering in Colorado has produced a rack system for the development of geostationary satellite communications systems using the RT Kintex.
“Seakr Engineering has collaborated with Xilinx for 15 years to consistently achieve challenging mission objectives for advanced space communications applications,” said Paul Rutt, CTO at Seakr. “We have baselined Xilinx’s 20nm Kintex UltraScale FPGAs with 12.5 GbpsSerDes links enabling high-throughput, flexible and reconfigurable modulation, demodulation, channelisation and routing capability in our newest advanced RF Reconfigurable processor, Wolverine.The Processor leverages the 10x increase in DSP compute capability for direct RF sampling compared to prior generation systems.”
Flight units of the 20nm RT Kintex UltraScale space-grade XQRKU060-1CNA1509 FPGA will bea vailable in Xilinx Class B and Class Y test flows per the MIL-PRF-38535 beginning in September 2020. Mechanical samples and prototype units are available now.
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