Industry-first PCIe 6.x interoperability demo
Astera Labs in the US has worked with Micron on the first industry demonstration of interoperability with the latest PCI Express PCIe 6.x technology.
The first public demonstration of end-to-end interoperability between a PCIe 6.x Switch and a PCIe 6.x solid state drive (SSD) uses the Scorpio P-series switch from Astera to provide sequential read rates of up to 27GB/s.
Hyperscale AI datacentres are under immense pressure to keep up with the processing demands of today’s AI workloads. These need high speed, scalable interconnect with low lency connections to large amounts of storage.
The latest version of the standard doubles the doubles the bandwidth of PCIe 5.0 with up to 256 GB/s of bidirectional throughput on each of 16 lanes with a low latency architecture. However making sure all the devices from different manufacturers, from CPU and GPU makers to hard drive suppliers, work together is key.
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The Scorpio P-Series Fabric Switch is designed for mixed traffic in an AI node with 64 lanes and a 4-port architecture to connect the CPU, GPU, storage and onward connections. The demonstration uses a CPU host, an Nvidia H100 Hopper GPU and two PCIe 6.x E3.S Micron SSDs. This uses Nvidia’s Magnum IO GPUDirect Storage (GDS) protocol to create a direct data path was established between the GPU and the SSD.
“Integrating Astera Labs’ COSMOS software suite, Scorpio delivers a smart, customizable connectivity backbone with unprecedented datacentre observability, enhanced security, and extensive fleet management capabilities,” said Jeff Chang, Sr. Principal Product Manager at Astera Labs. “When we combine COSMOS telemetry from Scorpio with telemetry from Aries PCIe/CXL Smart DSP Retimers, hyperscalers gain even more access to top-down insights into low level PCIe 6.x connectivity issues across their entire system.”
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