Intel samples 144 core 3nm power efficiency processor for the data centre
Intel is sampling its first Xeon data centre processor to use its more power efficient (E) cores with 144 in a socket.
The device, code-named Sierra Forest, is on track for the first half of 2024 and is built on the upcoming Intel 3 process, although it is already sampling to advanced customers.
Samples of the processor are working, with multiple OSes booting in less than a day.
The company is not referring to the device as a chip, indicating that it is using a number of separate chiplets in a package. This will help to increase yields on the new 3nm process technology.
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The Sierra Forest device will be followed by a Xeon Processor code-named Granite Rapids in 2024 as well. This will share the 3nm IP and technology platform with Sierra Forest is also sampling to customers, enhancing the memory interface.
The Multiplexer Combined Rank (MCR) DDR5 memory module achieves an 80% peak bandwidth increase over current-gen server memory technology, again helping reduce power consumption in data centre systems.
“We are building the fastest memory interface in the world for Granite Rapids,” said Lisa Spelman, Corporate Vice President and General Manager of Xeon Products at Intel. “Intel invented and led the ecosystem in developing a new type of DIMM called (MCR) that lets us achieve speeds of 8,800 mega transfers per second, based on DDR5.”
This will be followed by Clearwater Forest in 2025, another device with the E-cores but manufactured on the Intel 18A 1.8m process technology.
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