NXP launches its first MCX microcontrollers with machine learning

NXP launches its first MCX microcontrollers with machine learning

New Products |
By Nick Flaherty

NXP Semiconductor has launched the first family of microcontrollers following the merger its LCP and Kinetis lines.

The MCX N is the high end family with a dual Cortex M33 architecture running at 150MHz and a number of accelerators for neural networks and digital signal processing and peripheral managers for error checking and memory.

The MCX families range from the N down to the low end A with a W for wireless, and will be the lead devices for one of the world’s largest microcontroller suppliers.

“The first of the series will have a dual Cortex M33 150MHz core, but it’s not a traditional microcontroller,” CK Phua, product manager microcontrollers at NXP tells eeNews Europe. “We reduce the power consumption with distributed processing in the analog and digital peripherals.”

The custom neural processing unit (NPU) aims to take processing load off the CPUs for TinyML applications such as always-on microphones that are listening for vibrations or video streaming from camera for human presence detection, says Phua. NXP’s EIQ development tool allows users to train and extract the final values to download to the chip. “We have a different compute pipe and a different way of arranging the data,” said Phua.

Block diagram of the NXP MCX N

Block diagram of the NXP MCX N

The family will have up to 2Mbytes of SRAM on chip with optional full ECC error checking for applications that require safety or self checking. It also includes self testing without the need to write code with an error reporting module.

A SmartDMA handles data streaming from memory with the need for the CPU, while a ‘PowerQuad’ DSP block provides four parallel multiply accumulate (MAC) engines to speed up functions such as audio processing. Another DSP co-processor called CoolFlux supports powerline communications (PLC) for metering applications.

A Lifecycle management block ensures there is no roll back of old code or back doors, while the EdgeLock security subsystem provides encryption and key management.

There will be two families of microcontroller, both with the NPU

The N94X is the high end device, with 480kBytes of RAM and full ECC, a motor control subsystem with dual PWM, dual encoder, four 16bit ADCs, three instrumentation class op amps, three comparators and three DACs.

The N54X is aimed at IoT and consumer applications, removing the CoolFlux PLC DSP and adding a high speed USB (USB2.0) block. This also has a smaller subset of the analog blocks.

“In embedded a lot of applications will do well with USB2.0 as the 480Mbit/s is well matched to a 150MHz system for synchronisation,” said Phua.

The family also includes the flexible I/O feature that was used on the Kinetis devices and had been ported to the LPC55 series. This allows the configuration tool to reassign pins or groups of pins, although the high speed analog pins for USB lines and Ethernet interface are fixed.

“For the ADC we have two classes of pin, high speed and regular – we rely on the pin for sample and hold characteristics eg above 2Msample/s,” said Phua.

The family includes drivers for the Azure (ThreadX), FreeRTOS and Zephyr real time operating systems as well as middleware for USB, Ethernet and TCP/P stack.

The devices will sample in Q1 with production in the second half of 2023. Pricing will be announced with sampling but is expected to be $5 to $6 in volume.

Other articles on eeNews Europe


Linked Articles