Test chip for low power neuromorphic AI
Polyn Technology in Israel has sampled a test chip for its Neuromorphic Analog Signal Processor (NASP) technology for machine learning in sensors.
The NASP test chip contains several neural networks and is implemented in 55nm CMOS technology, allowing the elements to be integrated into system-on-chip devices. The design proves the NASP neuron-based model as well as the scalability of the technology and efficiency of the chip design automation tools developed by the startup, founded in 2019. It has raised $3.3m according to Crunchbase.
The NASP chip contains artificial neurons (nodes performing computations) and axons (connections with weights between the nodes) implemented using circuitry elements: neurons are implemented using operational amplifiers, and axons by using thin-film resistors.
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The NASP chip design is optimised for a sparse neural network, with only the necessary connections between neurons required for inference, which means the solution reduces the neural connections significantly and efficiently. In contrast to in-memory designs, where each neuron is connected to each neighbouring neuron, the NASP approach simplifies the chip layout. Such a design especially suits for Convolutional Neural Networks (CNN), where connections are very sparse, as well as RNN, Transformers, and Autoencoders.
All the sensor signals entering the input layer of the NASP chip at the same time are transmitted to the successive layers in parallel. There are no execution cycles, and no instructions directed to/from memory.
This is achieved by the design tools. The NASP model includes the chip design automation tools, namely Polyn’s T-Compiler and Synthesis tools, that convert any trained neural network into an optimal math model for the layout of the chip and still preserving compliance with original neural network.
This gives a chip with a power consumption of around 100uW for always on analysis of signals for wearable devices and smart tags with a 25Hz measurement frequency.
“This achievement validates the intensive work of our multinational team,” said Aleksandr Timofeev, CEO and founder of Polyn Technology. “Our chip represents the most advanced technology bridging analog computations and the digital core. It is designed with neuroscience in mind, replicating pre-processing the primary cortical area of the human brain makes at the periphery before learning at the centre.”
“Our first chip is created from trained neural networks by NASP compiler and synthesis tools that generated Netlist and the silicon engineering files from the software math model simulation. We will continue to refine our technology for creation of new generation chips,” said Yaakov Milstain, COO of Polyn.
The chip should be available to customers in the first quarter of 2023 as its first wearables product, with a fusion of PPG and IMU sensors for accurate heart rate measurement along with recognition and tracking of human activity.
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