Edge startup offers legacy support and ML acceleration: Page 2 of 2

April 08, 2020 // By Peter Clarke
Edge startup offers legacy support and ML acceleration
Sima.ai is a 2018 inferencing chip startup developing MLSoC, a convolutional neural network platform aimed at computer vision while support legacy applications with an embedded ARM processor.

Sima's true value add is in the machine learning accelerator (MLA) block. This is a tile based approach with multiple tiles able to be connected either off-chip in component arrays, or on-chip, by a proprietary AXI-based interconnect. This provides scalability to the architecture.

This block runs complex neural networks at much less power than GPUs. The tool chain is also being aimed at the mainstream with support for TensorFlow PyTorch and ONNX and other frameworks

Prasad reported a number of favourable benchmarks for MLSoC. Sima.ai expects the MLSoC to achieve 2,280 images per second (IPS) on ResNet-50 inference when running at a batch size of one (batch=1), which is typical for real-time video analysis. And while consuming just 4W.

Multple benchmark results for one mosaic tile at 50TOPS and 5W. Source: Sima.ai

In the case of untethered robots Prasad estimated that use of MLSoC could extend time away from the docking station from 45 mins to 8 hours.

When asked how Sima.ai intended to compete with established incumbents such as Intel-Mobileye and Nvidia, Prasad said that bringing the power profile down is key because customers wish to extend their workloads and are power-constrained.

Prasad admitted that the Mosaic tile is optimized for matrix multiplication and convolutional neural networks in particular but could support recurrent neural networks (RNNs) and long short-term memory (LSTM) networks.

Krishna Rangasayee is the founder and CEO of Sima.ai and the company has recently welcomed Moshe Gravielov, a director at TSMC, on to its board of directors.

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ResNet-50 - a misleading machine learning inference benchmark for megapixel images

Groq enters production with A0 tensor processor

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