PCIe 7.0 reaches version 0.7
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The PCI special interest group has released the latest version of the PCI Express standard for high speed interconnect.
“The PCIe 7.0 specification, version 0.7 is now available for member review,” said Al Yanes, PCI-SIG President and Chairperson.
“This specification version incorporates all the feedback we received from members on version 0.5 released in April 2024 and brings us one step closer to the full release of the PCIe 7.0 specification, targeted for 2025.”
This is part of a cadence of releasing a new specification every three years, with Synopsys providing early versions of the end-to-end IP for chip designers.
The PCIe 7.0 specification aims to double the bandwidth of PCIe 6.0 specification (64 GT/s) to 128 GT/s raw bit rate and up to 512 GB/s bi-directionally via x16 configuration with PAM4 (Pulse Amplitude Modulation with 4 levels) signaling. The current work is focusing on the channel parameters and reach as well as improving power efficiency
This will be used for 800G Ethernet, AI/ML, Cloud and Quantum Computing, Hyperscale Data Centres, High-Performance Computing (HPC) and Military/Aerospace applications.
pcisig.com/specifications/review-zone
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