PCIe-CXL IP on TSMC 5nm process for storage and chiplet designs
The IP is built on TSMC’s N5 process and aimed at the storage market and chiplet designs that require a hybrid PCIe-CXL solution. These designs use smaller chips, often for different protocols such as PCI Express and the new CXL memory interface, which are mounted on a substrate, an FPGA or the processor sub-system as a 3D-IC.
“This development was the direct result of tight integration and collaboration with some of our most advanced customers, who demanded a 5nm production-ready solution in 2021. We are so pleased that our team could deliver this industry-leading solution ahead of anyone else in the market,” said Jonathan Rogers, Founder and SVP of R&D at Alphawave IP, which is now based in the UK.
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“This development is very important for two key reasons. First, it once again demonstrates our technology leadership – this time on TSMC N5 process, the most advanced foundry solution available with best Power-Performance-Area (PPA), and with a high-end PCIe-CXL production solution required by our most demanding customers. Second, it demonstrates the commitment of Alphawave to the chiplet market. This solution will enable our most sophisticated hyperscaler and semiconductor companies to build chiplet-based SoCs that require this high-end hybrid PCIe-CXL solution,” said Tony Pialis, President and CEO of Alphawave IP.
“A key driver for our success in the market is our close collaboration with TSMC, the world’s leading semiconductor foundry with industry’s most comprehensive design ecosystem to enable the next-generation silicon innovations. We were pleased to work with TSMC on its industry-leading 7nm technology including the advanced N6 process and will continue our partnership to offer our leading portfolio of connectivity IPs on TSMC’s most advanced technologies at 5nm, 3nm and beyond.”
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