Quantum architectures tackles critical wiring problem
Planckian in Italy has developed a superconducting chip architecture drastically reduces cabling complexity, laying the groundwork for scaling quantum computers to fault-tolerant sizes.
Plankian has published a blueprint for the development a superconducting quantum chip natively designed to address the wiring problem. The chip architecture employs a new control setup it calls a conveyor-belt that manipulates qubits via a shared control line.
“The Planckian team has invented a powerful new architecture for superconducting quantum computers that represents an important advance towards scalable, fault tolerant computation,” said Seth Lloyd, professor of mechanical engineering and physics at MIT, an independent researcher who first hypothesized this type of architecture as a solution to this pressing scaling issue.
“The design can be implemented with current superconducting technology. It is both simple and elegant: it only relies on global controls, and it dramatically reduces the number of external wires needed to perform universal quantum computation. The proposed `conveyor belt’ architecture is a significant advance for the entire field of quantum information processing.”
Superconducting circuits are recognized as one of the most promising approaches for the development of large-scale quantum computers. However the current architecture relies on the individual control of each qubit, which inevitably leads to complex wiring and control systems as the size increases.
The “Conveyor-belt superconducting quantum computer” introduces an architecture where a subset of qubits is driven by the same global control line in a way that allows performing a complete set of gate operations.
These features build on the core features of a previous design which was released by Plankian in June and is described in a paper titled “A globally driven superconducting quantum computing architecture.”
The latest architecture enables a drastic reduction in the number of physical qubits compared to the previous design while expanding the number of multi-qubit operations that can be performed in single steps by including a three-qubit gate (“Toffoli gate”).
“This new streamlined layout significantly enhances the advantages of our superconducting architecture, which aims to cut the complexity of wirings and address fundamental challenges hindering scalability that are starting to become critical. Our approach is purpose-built for scalability and it allows not only to reduce the costs associated with control apparatus but also to reduce the thermal noise” said Marco Polini, CSO of Planckian. “We believe that these blueprints coupled with advancements in experimental developments planned in our roadmap open the door to collaborations that enable progress across the quantum computing ecosystem.”
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