Researchers in the US have come up with a new modular architecture for scaling a superconducting quantum computer.
Instead of creating a massive 2D array of qubits, the researchers at the University of Chicago have used a reconfigurable router as the hub of a modular system. This allows any two qubits in any module to connect and entangle, rather than being limited to the nearest neighbour, and allows for smaller chips with higher yields to be used to build large systems.
The team at the Cleland Lab in the Pritzker School of Molecular Engineering (PME) developed quantum switches that can connect and disconnect any qubit within a few nanoseconds, enabling high-fidelity quantum gates and the generation of quantum entanglement, a fundamental resource for quantum computing and communication.
These switches are capacitor-based SQUID (superconducting quantum interference device) loops. The switch coupling strength is controlled by dynamically tuning the magnetic flux threading each switch’s SQUID element. The qubit modules have separate grounds and are flip-chip assembled on a motherboard where the router and all the control lines are located. To simplify assembly, there are no galvanic connections between the modules and the motherboard, instead using capacitively coupled microwave grounds. The motherboard and the modules are built separately on sapphire substrates.
This central hub doesn’t limit the performance, showing an average fidelity of 96.00% ±0.08% and best fidelity of 97.14% ±0.07%, limited mainly by dephasing in the qubits. It also allows multiqubit entanglement, distributed across the separate modules, demonstrating GHZ-3 and GHZ-4 states with three and four entangled qubits with fidelities of 88.15% ±0.24% and 75.18% ±0.11%, respectively.
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“A quantum computer won’t necessarily compete with a classical computer in things like memory size or CPU size,” said PME Prof. Andrew Cleland. “Instead, they take advantage of a fundamentally different scaling: Doubling a classical computer’s computational power requires twice as big a CPU, or twice the clock speed. Doubling a quantum computer only requires one additional qubit.”
“In principle there’s no limit to the number of qubits that can connect via the routers,” said PME PhD candidate Xuntao Wu. “You can connect more qubits if you want more processing power, as long as they fit in a certain footprint.”
“Imagine you have a classical computer that has a motherboard integrating lots of different components, like your CPU or GPU, memory and other elements,” said Wu. “Part of our goal is to transfer this concept to the quantum realm.”
The superconducting qubit platform under development is seen as a promising approach to building a fault tolerant quantum compute and team is also looking to expand the distance over which they can entangle qubits.
“Right now, the coupling range is sort of medium-range, on the order of millimetres,” said Wu. “So if we’re trying to think of ways to connect remote qubits, then we must explore new ways to integrate other kind of technologies with our current setup.”
“A typical superconducting processor chip is a square shape with all the quantum bits fabricated on that. It’s a solid-state system on a planar structure,” said co-author Haoxiong Yan, who graduated from UChicago PME in the spring and now works as a quantum engineer for Applied Materials. “If you can imagine a 2-D array, like a square lattice, that’s the topology of typical superconducting quantum processors.”
This typical design causes several limitations. The nearest-neighbor connections limit the classes of quantum dynamics that can be implemented as well as the extent of parallelism the processor is able to execute.
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Finally, if all qubits are fabricated on the same planar substrate, then this poses a significant challenge to the fabrication yield, as even a small number of failed devices means the processor won’t work.
“To undertake practical quantum computing, we need millions or even billions of qubits and we need to make everything perfectly,” said Yan.
The team’s next steps are working on ways to scale up the quantum processor to more qubits, find novel protocols for expanding the processor’s capabilities, and, potentially, find ways to link router-connected qubit clusters the way supercomputers link their component processors.
This follows key developments at Google and Quantinuum on scalable quantum processor designs.
The full paper is at: doi.org/10.1103/PhysRevX.14.041030; www.uchicago.com