Technology-independent IP builds a versatile I²C controller

New Products | March 4, 2015

By eeNews Europe

EDA & CAD tools Displays & Interfaces

The DI2CM core provides an interface between a microprocessor or microcontroller and the I²C bus. It can work as a master transmitter or master receiver – depending on a working mode, determined by the microcontroller. This universal solution is available with various system interface wrappers such as AMBA – APB Bus, Altera Avalon Bus, or Xilinx OPB Bus.

DCD comments that describing the I²C as a two-wire, bi-directional serial bus, which provides a simple and efficient method of short distance data transmission between many devices, is quite obvious, but the reality is that the I²C bus can be very confusing, and not only for the newcomers.

The DI2CM core provides an interface between a microprocessor or microcontroller and the I²C bus. It can work as a master transmitter or a master receiver, as determined by its working mode, set by the microprocessor or microcontroller. The DI2CM core incorporates all features required by the latest I²C specification, including clock synchronisation, clock stretch, arbitration, multi-master systems and high-speed transmission mode. The DI2CM IP Core has also been equipped with built-in timer, which allows operation for a wide range of clk frequencies.

DCD’s latest solution is a technology independent design, and as with the company’s other IP Cores, it can be implemented in a variety of process technologies.

Features include;