I3C chips qualified for data centre designs

September 30, 2020 //By Nick Flaherty
I3C chips qualified for data centre designs
Apseed’s AST2600 Baseboard Management Controller (BMC) uses the IMX3102 2:1 bus multiplexer, IMX3112 1:2 bus expander and DDR5 SPD Hub SPD5118 from Renesas Electronics

Aspeed Technology has qualified I3C multiplexer, bus expander and DDR5 hub chips from Renesas Technologies for data centres and other embedded applications.

Apseed’s AST2600 Baseboard Management Controller (BMC) uses the IMX3102 2:1 bus multiplexer, IMX3112 1:2 bus expander and DDR5 SPD Hub SPD5118. 

Renesas is the first I3C partner selected for Aspeed's AST2600 BMC Approved Vendor List (AVL), enabling an easy migration path for customers shifting a DDR5 memeory sub-system from I2C or other legacy expansion specifications to the higher speed I3C specification.

The Renesas I3C re-driver and expander devices include in-band switching control via I2C/I3C commands to switch over, level-shifting capability with master devices working in 3.3V while peripherals work in 1.0V, and reduce the bill of materials costs by eliminating additional components such as pull-up resistors.

“The BMC SoC AST2600 is our first product to support the I3C interface, and we are glad to work with Renesas as a strong and trusted partner to introduce the I3C interface to the server market,” said Chris Lin, Chairman and President of Aspeed Technology. “Renesas’ excellent products and responsive support allow us to complete the I3C interface validation in a short period of time. Through the comprehensive interoperability test between Renesas and Aspeed, our customers will save their design-in efforts and time significantly, hence leading to a win-win situation for all of us.”

“Customers count on Renesas to conduct rigorous pre- and post-silicon verification of our devices to ensure specification compliance as well as interoperability with major components such as baseboard management controllers,” said Rami Sethi, Vice President and General Manager of the Data Centre Business Division at Renesas

I3C is gaining popularity as a high-speed host interface bus for applications requiring faster communication between host and peripheral or slave devices, as its 12.5 MHz speeds significantly outpace I2C’s 1 MHz speeds. This is particularly of interest for DDR5 memory designs in data centres to boost throughput. Both companies are actively engaged in ongoing collaboration for


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