Debug and trace probe for Synopsys ARC processors
Ashling has developed a debug & trace probe with support for multiple target architectures including the UK-designed Synopsys ARC processor.
Vitra-XS works with the Synopsys ARC MetaWare Development Toolkit, which is a complete development environment for embedded C/C++ development on ARC processors and includes an IDE, Compiler, Debugger and Analysis tools.
The tool supports all Synopsys ARC EM, EV, HS, NPX and VPX processors with the ARC Real-Time Trace (RTT) module (8-bit or dual 8-bit ports) in the toolkit from the 2023.6 release onwards.
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“Vitra-XS supports real-time trace which provides some key advantages when it comes to debugging and validating embedded systems. Using trace, developers can easily see how execution arrived at a certain point, via a back-trace or instruction history, and can answer questions like, ’How did I end up in this function?’ and ‘Why did my code crash?’ Trace information can be captured non-intrusively meaning that the application’s real-time performance is not affected and allows developers to profile their code to find out where time is actually being spent and to determine if performance related timing requirements are being met,” said Hugh O’Keeffe, CEO of Ashling.
Vitra-XS includes unlimited trace capture and storage support via high-speed, real-time streaming over SuperSpeed USB to host PC hard disk sa well as on-board trace storage memory up to 512MB. This can be configured as a circular buffer to allow continuous trace capture up to a defined event such as a breakpoint.
It can detect and automatically configure itself for the appropriate target voltage (from 1.2V to 3.3V) and there is automatic trace clock and data skew adjustment (“AUTOLOCK”) to ensure integrity of captured high-speed data. Vitra-XS automatically calibrates itself to the target’s trace data port.
There is parallel (up to 16-bits data and additional control) trace capture up to 400MHz with a 38-way Mictor target connector support and an optional Gigabit Ethernet interface.
“Software development schedules are often in the critical path in the design of embedded systems, so efficient tools for observing the behaviour of the software under test can dramatically affect time-to-market,” said John Koeter, Senior Vice President of Product Management and Strategy for IP at Synopsys.
“The combination of Synopsys ARC processors and Ashling’s new Vitra-XS probe gives software developers the visibility they need to rapidly resolve real-time software problems, increasing productivity to achieve project deadlines.”
www.ashling.com/ashling-arc/; www.synopsys.com/designware-ip/processor-solutions/arc-processors.html
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