First 16-lane protocol analysis system for PCIe 5.0
Viavi Solutions has launched the first 16-lane protocol analysis system with native support for PCI Express 5.0, operating at 32Gbit/s per lane, up from 8 lanes.
The Xgig 5P16 Protocol Analyser delivers detailed traffic analysis and jamming capabilities, enabling test and validation to meet the most demanding performance needs of emerging compute-intensive applications such as 400 Gigabit Ethernet, artificial intelligence (AI), IoT and hyperscale computing.
The system chassis includes an interposer for device under test (DUT) connectivity and the analyser license key. With a tightly coupled, yet modular architecture, component manufacturers can perform PCIe 5.0 standard tests as well as all previous revisions of PCI Express, while allowing for upgrades to enhanced capabilities in the future.
The chassis has 256GB of memory and flexible allocation to capture and save multiple data traces at all layers of the stack. A familiar Xgig management interface helps minimize training needs and startup costs. The sophisticated auto-tuning of signal integrity with the DUT makes for quick test bench setup and ensures a quality, repeatable capture to reduce issue resolution time.
“In today’s demanding, multiprotocol environments, component manufacturers need trusted technology and familiar user interfaces to streamline data traffic analysis and validation as they develop tomorrow’s high-performance networking equipment,” said Tom Fawcett, Vice President and General Manager, Lab and Production Business Unit at Viavi. “Viavi has delivered the first 16-lane protocol analysis system with native support for PCIe 5.0 to enable equipment manufacturers to keep pace with the ever-increasing demands of bandwidth-intensive computing.”
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