I3C standard embedded in PMICs for DDR5 memory modules
JEDEC and the MIPI Alliance have teamed up on a new standard for chip in memory modules based around I3C.
The JESD403-1 Module Sideband Bus standard published by JEDEC Solid State Technology Association is an extension of the I3C specification developed by the MIPI Allliance for DDR5 memory modules.
The SidebandBus was developed as both a subset and superset of the MIPI I3C Basic serial bus standard. It defines the parameters for usage of the system management control bus for the coming generation of DDR5 memory modules and beyond.
SidebandBus defines the system aspects of JEDEC’s application of the MIPI I3C Basic protocol and electrical characteristics. SidebandBus enhances I3C Basic with extended commands and functions such as a hub functionality that increases the number of supported devices on the bus without sacrificing the full 12.5 MHz throughput of the bus. SidebandBus also supports a smooth migration from legacy systems to the new interface by supporting operation in a slower I2C mode, allowing the industry time to transition.
With a parallel development, the SidebandBus is already incorporated into a family of new support devices focused on DDR5 including Power Management IC (PMICs), Thermal Sensors, Registering Clock Drivers (RCD), and the recently released Serial Presence Detect (SPD) device which acts as the SidebandBus hub for the other devices.
“SidebandBus represents a significant growth of JEDEC’s efforts to coordinate a wide variety of functions to enable the system level factors to enable the next generation of high-performance memories,” said Bill Gervasi, Chairman of the SPD Task Group that developed the SidebandBus standard. “The high-performance communications enabled by this system management bus allow systems to efficiently configure the new memory modules and collect telemetry data in real time to monitor system health on the fly.”
“MIPI Alliance has a well-established relationship with JEDEC that has continued to advance the industries we serve through the development of complementary specifications,” said Peter Lefkin, MIPI Alliance Managing Director. “MIPI I3C, along with its subset, I3C Basic, has been widely embraced as the next-generation bus interface, and we’re pleased to support its use in JEDEC’s new SidebandBus standard.”
“JEDEC is delighted to continue our longstanding collaboration with MIPI Alliance on the development of I3C Basic and SidebandBus, which have helped the industry converge on a unified strategy for serial buses for the next generation of networked electronic devices,” added Mian Quddus, JEDEC Board of Directors Chairman.
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