Marvell expects to see 40 percent of its revenues from the data centre, the highest in the industry, with $1.5bn in cloud, 5G and automotive. The company expects thi sto grow 40 percent a year, twice the growth of the market.
A key element is a new silicon platform based on TSMC’s 3nm process technology with advanced die-to-die interface IP and TSMC’s advanced 2.5D Chip-on-Wafer-on-Substrate (CoWoS) packaging technology. Marvell has developed key standards-based IP for the cloud data centre, 5G carrier, automotive and enterprise markets.
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The 3nm multi-chip platform includes two complementary advanced die-to-die interfaces. The first is a flexible extra short reach (XSR) interface for connecting multiple die on a package substrate for applications, like co-packaged optics (CPO) for cloud data centres.
Marvell is also developing an ultra-low power and low-latency parallel die-to-die interface with the highest bandwidth density in the industry. Compatible with emerging Open Compute Project (OCP) standards, the new parallel interface enables high-performance chiplet solutions by connecting multiple silicon devices on an interposer. Both interfaces are also available in 5nm to enable multi-node solutions.
The new platform also incorporates TSMC’s advanced CoWoS packaging technology, empowering continued data infrastructure performance scaling. Marvell’s collaboration with TSMC on CoWoS allows customers to build high-performance solutions for the most demanding cloud data center applications.
“Marvell is proud to be the lead vendor to offer a 3nm platform for cloud-optimized solutions,” said Sandeep Bharathi, Executive Vice President, Central Engineering, System-on-Chip Group at Marvell. “Our new advanced node platform places Marvell on the leading edge of technology readiness with early Si validation of critical IPs to enable fast time-to-market.”
Marvell is currently engaged and collaborating with all the leading data infrastructure innovators.
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