Synopsys has launched a new version of faster SPICE tools with common data models that allow simulation of larger mixed signal and chiplet designs.
The PrimeSim Continuum uses common data formats to allow different simulators including H SPICE and FastSPICE to be used across different parts of a design. This is particularly relevant for chiplet and 3D stacked memory chips in system in package (SIP) designs that need to simulate designs at different levels.
“There is systemic complexity and scale complexity, that’s two dimensions that need to be dealt with,” said Hany Elhak, snr director, product management in the custom IC and physical verification group.
“We have a new architecture for that with improved partitioning, and GPU acceleration that is 2 to 5x faster,” Elhak told eeNews Europe. “Previously we could simulate a memory controller and two die, now we can go to 6 die with 5bn elements in the same simulation. You need the interconnection between the die and we are enabling that today.”
“Every design type requires certain verification methodologies with different sweet spots for the SPICE model so the idea was not to try to do one tool that solves everything but to get the optimised tools and engines so it is a continuum,” he said.
“The system on chip is growing to include the analogue functionality with US companies acquiring European companies in power management as they want that on the chip and that is forcing analogue designs onto the advanced nodes. This adds a lot of complexity for the chip makers,” he added.
The other problem is scaling with high speed blocks.
“To complicate the problem further, now DRAM is stacks of die integrated with the rest of the chip on a silicon interposer that increases the scale and systemic complexity and that redefines how the system simulation needs to be done,” he said.
“What we see now is there is really a need for convergence around a common circuit simulator and common verification so companies don’t need to build their own ad hoc flows as the problem is too complex for ad hoc flows,” he added. “That’s what we are looking to solve with PrimeSim Continuum.”
This combines PrimeSim SPICE, PrimeSim Pro, PrimeSim HSPICE and PrimeSim XA as well as the PrimeWave design environment for analogue, RF and digital designs.
“The most important factor is the device model and we work with all the foundries on golden edge SPICE device models for simulating a DRAM or an oscillator,” said Elhak. “We make sure the netlist we are parsing is the same no matter what, for example if its an oscillator on its own, then integrated into a PLL and then into a SERDES PHY.”
This can also be integrated with system-level tools such as an EMI emissions simulator.
“In the past every SPICE simulator had their own way of handling S parameters but we have integrated the S-parameter edge SPICE model into PrimeSim for all the data coming from EM tools,” he added.
“PrimeSim Continuum represents a revolutionary breakthrough in circuit simulation innovation with heterogeneous compute acceleration on GPU/CPU, setting a new bar for EDA solutions,” said Sassine Ghazi, Chief Operating Officer at Synopsys.
The simulators have been re-designed to make use of acceleration on graphics processor units, both on a company premises and in the cloud, and the technology is already being used by memory maker Kioxia and Samsung as well as GPU designer Nvidia.
“We scale across multiple CPUs and see a speed up of 10x across 16 cores, but we have also introduced scaling on GPUs. We have ported the spice algorithms to run on GPUS with a hybrid model,” said Elhak. “We port the matrix to the GPU cores with a GPU friendly data structure and by doing that we can get higher capacities. For example, a a synthesizer design with 108m elements is 11x faster using GPU cards.”
“We have tested this with three customers who had dedicated GPU resources,” said Elhak. “In the cloud companies can have these GPUs available in the cloud and those companies will benefit faster than others. It’s a question of whether they are comfortable with that, with the models from the foundry, if the legal and security issues are sorted out then they can use it. From the technology side we worked with the three biggest cloud providers and tested the technology,” he said.
- Socionext taps Synopsys 5nm memory IP for datacentre AI
- Synopsys ports physical sign-off tools to Samsung Foundry
Other articles on eeNews Europe