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Baya Systems emerges from stealth with chiplet interconnect – update

Baya Systems emerges from stealth with chiplet interconnect – update

Technology News |
By Nick Flaherty



Baya Systems has emerged from stealth with an interconnect tool for chiplet and complex system on chip (SoC) designs.

“What we feel we bring to the table is a more software driven development process,” Nandan Nayampally, chief commercial officer of Baya Systems tells eeNews Europe. “We consider this to be the first really focussed fabric for AI.”

The company has executive from Intel, Netspeed Systems, ARM, Brainchip, AMD  and Nuvia and is chaired by microprocessor expert Jim Keller, who is also CEO of AI chip developer Tenstorrent. It is backed by Matrix and Intel Capital.  

“We focus on the data driven generation of IP with both static and dynamic microarchitectural analysis at runtime,” said Nayampally. “When you do complex systems, the devil is in the detail and system fabric is not that easy.”

The WeaveIP provides components to build a unified fabric that has an efficient, scalable transport architecture that maximizes performance and throughput, while minimizing latency, silicon footprint and power. This supports standard protocols such as CHI, ACE5-Lite, AXI5 and extendable to others including CXL.

The WeaverPro tool supports the SoC designer from initial specification all the way to post-silicon tuning. This uses the WeaveIP to produce a unified mesh fabric approach to generating layer protocols on top of the fabric without the need for gaskets that translate the protocols and the bottlenecks that come with this and slow down the performance.

“The transport is common so you can customise that for the QoS or debug protocols and build protocols on top.”

This comes from the software-driven analysis of the design that can configure up to eight virtual channels across the chip at runtime.

“What we do with our software is very efficient cache memory analysis, get accurate partitioning and caching, and a fabric component that generates a correct by construction physical design. We have two main flavours, where you can define your own protocol and one with multicast for AI designs,” he said.

“We can optimise the bandwidth and reduce the wires and logic to use those wires efficiently for optimising for latency and bandwidth, with up to 3GHz in a 4nm process.”

The fabric is customisable at runtime with APIs so you can tune the parameters for efficiency. “In general the flexibility we have put in helps overall with the reduction in silicon footprint and power and that comes from having an accurate understanding of the data movement,” he said.

The fabric is designed for inside the chip and the chiplet, and Baya will work with interconnect schemes such as Eliyan’s Bunch of Wires and UCIe.

“We stop at the die boundaries but what we end up doing outside of that is the software understands chiplet boundaries and can optimise across chiplet boundaries. So it’s a chiplet-ready network, as various things need to be built into the network to make it easier to use in chiplets,” he said.

“Our first partner is Blue Cheetah. They do the link layers, and once we understand their wires we can optimise and allow API tuning in the future as well,” said Nayampally.

The company has since announced Tenstorrent as a customer for the WeaveIP fabric, which is not a surprise with Jim Keller as chairman.

“Baya makes great, comprehensive fabric tools. Their tools start with top level architecture then allow us to plan at a detail level including performance modeling, transport, quality of service and cache coherency,” said Keller, Tenstorrent CEO. “This, coupled with their visualization tools, enables designers to build next generation chips, chiplets and IP. This data-driven, correct by construction fabric IP delivers the performance and scale needed for Tenstorrent’s chiplet-based solutions.”

“The semiconductor industry is at an inflection point in how to overcome the widening gap between memory performance and the processing needs of AI,” said Dr. Sailesh Kumar, CEO at Baya Systems.

“These challenges are overwhelming the industry with design complexity, energy costs, and systems that are obsolete by the time they hit the market. Baya Systems is resolute in delivering foundational software, an industry-first, grounds-up fabric solution for future-proof multi-cluster and multi-chiplet designs, and a methodology that takes out the guesswork. I firmly believe that Baya unlocks the merchant chiplet market that is expected to grow to $107 billion by 2033.”

“Tenstorrent is reputed for highly customized, high-performance AI and RISC-V solutions tailored to specific workloads and applications, which need to be future-proof,” he said. “We believe Baya’s high-performance, reliable chiplet-ready fabric, and advanced analysis capability, design-time, and post-silicon runtime tuning, will be an essential component of Tenstorrent’s ability to deliver high-performance cost-effective multi-chip designs that next-level energy efficiency and are future-proofed for fast evolving applications.”

www.bayasystems.com

 

 

 

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