Ceva boosts DSP AI cores to 3TOPS

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By Nick Flaherty

Ceva has launched its second generation of DSP AI hub IP.

The SensPro family of blocks support scalar digital signal processing and machine learning for workloads associated with a wide range of sensors including camera, radar, LiDAR, Time-of-Flight, microphones and inertial measurement units (IMUs).

The family has been extended downwards to add AI to smaller sensors such as microphones and earbuds with 0.2TOPS of performance from an INT8 array, and upwards with the first floating point FP32 AI implementation.

“We have the dedicated DSP for vision and audio but we found the need to introduce the family for processing multiple sensors as well as AI,” said Moshe Sheier vice president of marketing at Ceva.

Each DSP block can be extended with application-specific instruction set architectures (ISAs) for radar, audio, computer vision and SLAM, along with parallel vector compute options for floating point and integer data types. This provides a power consumption reduction of 20 percent with a doubling of processing performance.

The cores use a combination of a scalar DSP with a vector engine with an array of multiple accumulate (MAC) units that can be used for DSP or for AI frameworks.

“These have a common ISA so whether you chose a smaller core or a larger one, its easy to migrate the software to a larger core and get the boost,” said Maier. “In the SP50 with 64 8×8 MACs we would have the same scalar DSP with a smaller array of MACs for example for noise reduction in a headset as well as a neural net on the vector engine – that would be done sequentially, not in parallel. The scalar is the controller and issues the command to the vector unit, it’s a matter of time sharing, perhaps using a trigger to run the neural network for inference.”

As well as the custom extension, the data bandwidth has been doubled to provide higher performance.

For automotive powertrain applications, the upgraded floating-point DSPs offer high-precision performance, addressing the electrification trend with ASIL B support for hardware random faults and ASIL D systematic fault certification.

The 2nd generation SensPro DSP family consists of:

  • The SP100 and SP50 DSPs, with 128 and 64 INT8 MACS, respectively. These DSPs offer the smallest die size and deliver a 10X performance improvement for DeepSpeech2 speech recognition neural network, compared to the CEVA-BX2 scalar DSP, and are aimed at audio AI workloads such as conversational assistants, sound analytics, and natural language processing (NLP).
  • The SP1000, SP500 and SP250 DSPs have 1024, 512, and 256 INT8 MACs, respectively. These are configured for computer vision, SLAM, Radar, and AI workloads.
  • The SPF4 and SPF2 floating point DSPs, with 64 and 32 single precision floating point MACs, respectively. These DSPs are optimized for electric vehicle powertrain control and battery management systems, complemented by a full suite of Eigen Linear Algebra, MATLAB vector libraries and support for Glow graph compiler.

For the smaller blocks, the cores support Google’s Tensorflow AI framework, which can be converted to Tensorflow Lite (TFL). This can then be converted to TFLmicro that runs baremetal on the core.

“Google provides a TFL converter after designing the network on the PC but they also provide a TFLmicro for bare metal with operators defined and we have optimised 100 operators on the cores and that’s how we are able to map those nets on the core –  we are using the dedicated ISA for audio, sound, imaging and radar,” he said.

SensPro2 is also supported by an LLVM C/C++ compiler, Eclipse based integrated development environment (IDE), OpenVX API, software libraries for OpenCL, CEVA deep neural network (CDNN) graph compiler including the CDNN-Invite API for inclusion of custom AI engines, CEVA-CV imaging functions, CEVA-SLAM software development kit and vision libraries, Radar SDK, ClearVox noise reduction, WhisPro speech recognition, MotionEngine sensor fusion and the SenslinQ software framework.

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