Customizable RISC-V core for power-efficient applications
Codasip in Munich has launched a RISC-V core delivers up to 50% improvements in performance per watt and 20% smaller code size.
The L110 low power embedded processor core is available alongside the next generation of processor design automation toolset, Codasip Studio Fusion.
This allows designers to add customizations for application-specific PPA (Power, Performance, and Area) improvements. Bounded Customization in the Codasip Studio Fusion tools lets customers achieve a fast time to market for high-quality, fully verified RISC-V cores. The core can be extended with new instructions without risk because the functionality of the baseline core is guaranteed. A new verification framework substantially simplifies the verification of custom instructions.
The base L110 RISC-V RV32IEMCB core design delivers up to 50% improvements in performance per watt and 20% smaller code size compared to similar cores in the market says Codasip and is aimed at small-area, low-power applications, such as state machine replacements, sensor controllers, and IoT edge.
“Customization allows designers to introduce new instructions specific to their software workload and significantly improve PPA,” comments Brett Cline, chief commercial officer at Codasip. “Our new core offers best-in-class performance for small-area and low-power applications accompanied by new possibilities for easy and quick customization with no risk to the core functionality. We offer all this in a flexible business model that will not cost you an arm and a leg.”
The new version, Codasip Studio Fusion, improves this fundamental capability and adds a segmentation layer. Customers can configure the core from set options, create custom instructions within set bounds, or design freely. The tools automatically generate an SDK (Software Development Toolkit) including a compiler, simulation models, debugger, and profiler, and an HDK (Hardware Development Kit) including RTL (Register Transfer Level), a verification framework, and more.
The latest version also introduces more design automation to make processor design even easier and faster. New design constructs allow for fusing the processor’s architectural and microarchitectural description. The toolset can also automatically convert declarative descriptions of common processor aspects into low-level logic.
The benefits of the Codasip Studio Fusion toolset are all reflected in the new L110 core, which can be used as a pre-verified starting point to achieve the right level of customization. For customers in need of a starting point with higher performance, Codasip offers other options such as the 64-bit RISC-V application core A730.
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