Virtual prototyping tool for mobile, automotive and hyperscale systems
Cadence Design Systems has developed platform that accelerates the creation of virtual and hybrid prototypes of complex systems across hardware and software.
The Helium Studio enables early software bring-up for hardware-software co-verification and co-debug, provides comprehensive support for platform assembly, enables the creation and debug of virtual models and offers a rich library of pre-built virtual models and hybrid adapters. Using the system, verification with a virtual or hybrid model of the SoC is not just orders of magnitude faster than verification with a pure RTL model, it enables early software bring-up before the RTL is available let alone the silicon of a complex chip.
The tool is designed with native interfaces to the Cadence verification engines, including the Palladium Z2 Enterprise Emulation Platform, the Protium X2 Enterprise Prototyping Platform and Xcelium Logic Simulator to provide software developers with a uniform debug experience from virtual model to RTL.
The tool has already been used for the design of graphics and 5G chips.
“The ability to boot a commercially available OS and run industry benchmarks for our latest GPUs and SoCs before silicon is available is critical for our first-pass success and time-to-market goals,” said Narendra Konda, senior director of Hardware Engineering at GPU designer Nvidia.
“Using the Cadence Helium Virtual and Hybrid Studio, which is natively integrated with the Palladium and Protium platforms, we are able to find and fix many software and RTL bugs pre-silicon. The order of magnitude throughput improvement we achieved with the hybrid platform allowed us to perform long-running tests in a pre-silicon environment. The Helium Studio’s unique gearshift technology lets us hot-swap software execution from virtual to RTL dynamically, giving us the software bring-up speed and the accuracy of RTL when needed. The Helium Studio’s embedded software debug capability enables uniform hardware-software co-debug whether running on software on a virtual core or RTL core.”
“Using Cadence Helium Virtual and Hybrid Studio, we were able to run physical-layer verification for our 5G design and to develop and debug our L2/L3-layer protocol software code two months earlier than our previous designs,” said -Qing Lin, CTO of Chinese 5G processor Cygnus.
“We have found that the Helium Studio runs 50-100 times faster in hybrid mode, allowing for quick software code iteration. It natively integrates with the powerful Palladium system capabilities, enabling a smooth transition from virtual to hybrid to full RTL in emulator for hardware and software co-verification, allowing us to accelerate our design schedules by months.”
The Helium Virtual Studio allows GUI-based platform assembly for quick and correct-by-construction platform creation, enabling early software bring-up. Once the platform is assembled, the virtual studio can be used to execute and debug the software stack and the hardware design.
The Helium Hybrid Studio allows designers to create hybrid configurations quickly using a library of hybrid adapters, transactors and smart memory that optimize communication channels for maximum throughput and are natively integrated in the Palladium and Protium platforms. The technology allows users to hot-swap software bring-up from virtual to RTL, providing high speed when needed and high accuracy on the RTL engines when necessary.
A Virtual model library includes the latest ARM technology model portfolio, which includes support for Armv9-A, in which designers can access multiple reference and starter virtual and hybrid platforms that are ready to boot on the latest Linux and Android operating systems, accelerating bring-up time for new platforms.
Support for multi-core, multi-process debug of embedded software allows designers to have greater control and visibility into the software through use of a single debugger that works with software running on virtual platforms and RTL platforms simultaneously. The native integration of the software engine with the virtual and RTL runtime engines enables synchronized hardware-software debug.
“Validating embedded software concurrently with RTL and earlier in the development process is critical to ensuring the success of next-generation mobile, automotive and hyperscale SoC designs,” said Paul Cunningham, senior vice president and general manager of the System & Verification Group at Cadence. “Our new Helium Studio takes advantage of our best-in-class verification engines, including the Palladium and Protium dynamic duo, to enable fast software development and benchmarking for power and performance validation. This new system provides designers with a unified platform that accelerates overall verification throughput.”
www.cadence.com/go/HeliumStudio
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