Codasip partners with Western Digital on open‑source processors

A supplier of configurable RISC-V embedded processor IP, Codasip GmbH announced it has joined forces with Western Digital Corp. to become the preferred provider of hardware implementation packages and expert technical support for users of Western Digital’s SweRV Core EH1, a RISC-V core currently available to the open-source community and further supported by the open-source development organization CHIPS Alliance.

CHIPS Alliance is a barrier free environment which allows collaboration for open-source software and hardware code.

The SweRV Core EH1 is a 32-bit, 2-way superscalar, 9-stage pipeline core introduced earlier this year by Western Digital, a leader in data infrastructure. With performance of up to 4.9 CoreMark/MHz and a small footprint, it offers compelling capabilities for embedded devices supporting data-intensive edge applications, such as storage controllers, industrial IoT, real-time analytics in surveillance systems, and other smart systems. The power-efficient design also offers clock speeds of up to 1.8 GHz on a 28nm CMOS process technology.

The new SweRV Support Package (SSP) from Codasip provides all of the components necessary to design, implement, test, and write software for a SweRV Core-based system-on-chip, including but not limited to verification testbenches and intellectual property, reference scripts for leading EDA flows, models for simulation and emulation, and software development tools—all backed by professional technical support.