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Intel, Micron lag behind Toshiba in 96-layer 3D-NAND, 4bits per cell

Intel, Micron lag behind Toshiba in 96-layer 3D-NAND, 4bits per cell

Technology News |
By Peter Clarke



This is despite the fact that Micron and Intel have ended their collaboration on 3D-NAND flash (see Intel, Micron call time on 3D-NAND collaboration) and are nearly year behind Toshiba in making the same moves (see Toshiba takes 3D-NAND to 96-layers, 4 bits per cell).

The 4bits/cell NAND is the world’s first commercially available 1Tbit chip, the companies’ claim, and is based on the second generation 64-layer structure.

The companies also announced development progress on the third-generation 96-tier 3D NAND structure.

Both the NAND technology advancements utilize CMOS under the array (CuA) technology to reduce die sizes and deliver improved performance when compared to competitive approaches. By using four planes of logic versus the competitors’ two planes, the Intel and Micron NAND flash memory can write and read more cells in parallel, delivering higher throughput and bandwidth at the system level.

Related links and articles:

www.micron.com

www.intel.com

News articles:

Toshiba takes 3D-NAND to 96-layers, 4 bits per cell

Intel, Micron call time on 3D-NAND collaboration

China’s Unigroup plans to spend $60 billion, says report

China approves Toshiba memory sale

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