The prototype superconducting 4bit processor developed at Yokohama National University is based around unshunted Josephson junction (JJ) devices built into superconductor digital electronic structures called adiabatic quantum-flux-parametron (AQFP) for a hybrid RISC data flow machine.
Despite cooling to 4.2K, the low switching energy of 1.4 zJ for each JJ junction means the overall system power consumption is still significantly lower than current room temperature semiconductor devices.
This opens up the possibility of ultra-low-power, high-performance microprocessors and other computing hardware for the next generation of data centres and communication networks as well as neuromorphic machine learning chips.
"The digital communications infrastructure that supports the Information Age that we live in today currently uses approximately 10% of the global electricity. Studies suggest that in the worst case scenario, if there is no fundamental change in the underlying technology of our communications infrastructure such as the computing hardware in large data centres or the electronics that drive the communication networks, we may see its electricity usage rise to over 50% of the global electricity by 2030," said Christopher Ayala, an associate professor at Yokohama National University, and lead author of the study.
The research was published in IEEE Journal of Solid-State Circuits. "In this paper, we wanted to prove that the AQFP is capable of practical energy-efficient high-speed computing, and we did this by developing and successfully demonstrating a prototype 4-bit AQFP microprocessor called MANA (Monolithic Adiabatic iNtegration Architecture), the world's first adiabatic superconductor microprocessor," said Ayala.
"The demonstration of our prototype microprocessor shows that the AQFP is capable of all aspects of computing, namely: data processing and data storage. We also show on a separate chip that the data processing part of the microprocessor can operate up to a clock frequency of 2.5 GHz making this on par with today's computing technologies. We even expect this to increase to 5-10 GHz as we make improvements in our design methodology and our experimental setup," said Ayala.
“We demonstrate register file R/W access, ALU execution, hardware stalling, and program branching performed at 100 kHz under the cryogenic temperature of 4.2 K. We also successfully demonstrated a high-speed breakout chip of the microprocessor execution units up to 2.5 GHz,” he added.