RISC-V gathers pace in Europe
The RISC-V Summit Europe brought together developers, architects, technical decision and policy makers from across European RISC-V ecosystem for the first time in the region this week.
Attendees from academia, research, SMEs, industry and open source communities gathered in Barcelona to discuss the technologies and research shaping the future of RISC-V computing, in applications such as Automotive, High Performance Computing, AI, and Security.
Technical Working Group Meetings were followed by a track of keynotes, invited and selected talks alongside an exhibition showcasing the latest developments across industry and research and a day of workshops today.
eeNews Europe was of course on hand to bring the latest news from the Summit across the week:
Interview with Calista Redmond – RISC-V summit Barcelona
The RISC-V Report – interviewing the key players (2017-2023)
Agile Analog launches first complete RISC-V analog IP subsystem
Agile Analog launches first complete RISC-V analog IP subsystem
Ashling SDK supports German SIM-V RISC-V Instruction Set Simulator
Fully customisable vector unit complements 64-bit RISC-V cores
Other recent European RISC-V articles
- RISC-V chip designed with open source tools
- Spanish startup performs RISC-V open core surgery
- New CTO at Tasking looks to Rust and RISC-V
- Europe steps up as RISC-V ships 10bn cores
- Imperas in RISC-V three way deal
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
